Are you familiar with this seminal paper, titled “Matching Properties of MOS Transistors” with the first author Marcel Pelgrom?

Yes! Pelgrom, the Mr. Matching!

I happened to find an online tutorial dealing with component matching given by him from IDESA. It was really interesting! In the tutorial, some slides are quite informative, and I would like to share them here.

• Order of magnitude in the electronics world

• Why do we always deal with Normal distribution?

• For VT matching, NMOS is generally bettwer than PMOS.

However, for more advanced CMOS process, where NMOS also has a dedicated PWELL, then, …not exactly.

• The key figure of merit for MOSFET VT matching

Avt is the mismatch of one square um transistor, and it behaves 1mVum per nm gate oxide thickness.

• Current factor matching is generally of the order of 2%um.

There is no clear trend of process scaling effects.

• Sub-threshold drain current matching in 65 nm

Compared to current factor matching, the VT matching dominates. The worst-case number is around 50%, e…huge!

• Last but not least, let’s take a look at the process data at hand.

For 130nm CMOS process, the gate oxide is 2nm. Avt of NMOS is 3.5mVum, and Avt of PMOS is 3.5mVum. Abeta of NMOS is 1.04%um, and Abeta of PMOS is 1.19%um. (Here, I picked the standard transistor type and with large width >0.6um/large length>0.24um.)

For 65nm CMOS process, the gate oxide is 1.8nm. Avt of NMOS is 4.0mVum, and Avt of PMOS is 3.3mVum. Abeta can’t be found. (Here, I picked the standard transistor type of general purpose.)

The above data not exactly matches what Mr. Matching has said, but still there is good agreement especially for larger size. Since we are moving to more advanced nodes, classic experimental numbers could be a good reference, but always be cautious about the larger process variations we gonna meet with.