The topic of noise-shaping SAR ADC will come to an end in this post. In Part A, I briefly talked about the concept of noise shaping applied to sigma-delta modulators. In Part B, I introduced one special property of SAR ADCs which can be utilized to perform noise-shaping – the SAR architecture can generate the conversion residue without a feedback DAC. Then some form of noise shaping was achieved, but the result was not so satisfactory. In this post, I will continue the journey.
A small summarize of performing noise shaping on the SAR architecture from Part B:
- let the DAC array complete all the switching based on the decisions from MSB to LSB (the conversion residue is generated)
- sample the conversion residue () on an extra capacitor
- apply the residue with opposite sign () to the opposite terminal of the comparator
If the extra capacitor is much smaller than the array capacitor, the current residue is sampled and there is almost no memory effect. The linear model of the SAR ADC looks like:
If an integrator is added to Fig. 1, the noise transfer function NTF becomes identical to the 1st-order noise shaping:
The corresponding hardware implementation could look like this:
1st-order noise shaping is finally achieved! BUT, circuit design is all about compromise. There are some concerns. Just list some of them as follows:
- kT/C_R is not noise-shaped anymore
- of course, you can never get an amplifier with infinite gain
- residue attenuation due to charge sharing between sampling capacitor and parasitic capacitor at the amplifier input
- switch-induced error
I would like to stop here (because weekend is coming ;-).
If you want to know more about practical solutions. I recommend the interesting and well-written paper . I would like to thank the authors. I enjoyed a lot reading their paper.
 J. A. Fredenburg and M. P. Flynn, “A 90-MS/s 11-MHz-Bandwidth 62-dB SNDR Noise-shaping SAR ADC”, JSSC, vol.47, 2012.