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Author Archives: Dai
Gm/Id-Design Methodology
Three times of entering a wrong password to access this site… Earlier in 2012, I wrote an introductory post about EKV model and later extended the related topic a little bit in another post – Stay Simple – Square-Law Equation … Continue reading
Brief Study of Noise-Shaping SAR ADC – Part C
The topic of noise-shaping SAR ADC will come to an end in this post. In Part A, I briefly talked about the concept of noise shaping applied to sigma-delta modulators. In Part B, I introduced one special property of SAR … Continue reading
Brief Study of Noise-Shaping SAR ADC – Part B
In the previous post, I’ve shared some basics of sigma-delta ADC. In this post, before we look at the noise-shaping SAR ADC, let’s again do a warm-up. The z-domain linear model for a 1st-order sigma-delta modulator: The linear model has … Continue reading
Brief Study of Noise-Shaping SAR ADC – Part A
Sometimes it is much easier to become a fan of something when you only know something about it. Just like Sigma-Delta ADC, it is so complicated that even though I have learned it for several times I still can’t fully understand it! Nevertheless, I am … Continue reading
Noise Effect On The Distribution of ADC Output Codes
In the previous post, the probability of comparator decision with the existence of noise was calculated. In this post, the topic about noise and probability will continue. The whole topic is actually inspired by a 1986-paper [1], which discusses noise effect … Continue reading
Noise Effect On The Probability of Comparator Decision
In the previous post, it is explained why normal distribution with a standard deviation of is used to characterize the circuit input-referred noise. In this post, we will calculate the probability of comparator decision (High or Low) with the existence of noise. We … Continue reading
Posted in Analog Design
Tagged Normal Distribution, Probability of Comparator Decision, Thermal Noise
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Normal Distribution and Input-Referred Noise
Normal distribution is frequently assumed when we do circuit analysis. Why? Because there is a saying that the sum of a large number of random variables converges to the Normal. Under what condition is this true? The central limit theorem deals with … Continue reading
Stay Simple – Square-Law Equation Related
The 1st post in 2013. Happy middle new year! 😉 Nowadays most of us in academy are designing analog circuits in deep-submicron nodes using short-channel transistors. Putting them together with the digital, building up a system, and selling it with extraordinary performance in top … Continue reading
Brief Study of Dither C: Dithered DNL
In ‘Dither’ series B, I have shown dither reduces the harmonic distortion by decolalizing the code mapping of the analog signal from the transfer curve. So if we take a step further, we might say the main purpose of dither is … Continue reading
Brief Study of Dither B: Dither
In ‘Dither’ series A, I mentioned that the quantization will introduce large harmonics to a low-level sinusoidal signal. Let’s look at another example in Figure 1 [1]. Adding dither to the circuit means adding noise to the circuit. Now let’s … Continue reading
EveryNano Counts 