Category Archives: Analog Design

Go Moderate

Posted on August 7, 2016 by

Either Prof. Sansen’s inversion coefficient (IC) approach or Prof. Murmann’s Gm/Id design methodology is telling the same story of power-aware analog design. With the help of Gm/Id design kit, I can easily visualize the transistor performance as a function of its gate-source voltage … Continue reading →

Posted in Analog Design, MOS Models | Tagged , , | 1 Comment

The Calculation of Phase Margin

Posted on August 3, 2016 by

Negative feedback is ubiquitous, and the discussion on its stability can be found everywhere. For ease of reference, I will put a memo on the equations to calculate the phase margin. The amplifying system may includes multiple poles: . Neglecting higher … Continue reading →

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Gm/Id-Design Methodology

Posted on July 30, 2016 by

Three times of entering a wrong password to access this site… Earlier in 2012, I wrote an introductory post about EKV model and later extended the related topic a little bit in another post – Stay Simple – Square-Law Equation … Continue reading →

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Noise Effect On The Probability of Comparator Decision

Posted on June 25, 2013 by

In the previous post, it is explained why normal distribution with a standard deviation of  is used to characterize the circuit input-referred noise. In this post, we will calculate the probability of comparator decision (High or Low) with the existence of noise. We … Continue reading →

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Normal Distribution and Input-Referred Noise

Posted on June 5, 2013 by

Normal distribution is frequently assumed when we do circuit analysis. Why? Because there is a saying that the sum of a large number of random variables converges to the Normal. Under what condition is this true? The central limit theorem deals with … Continue reading →

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Shall We Go for ALL-Digital Solution?

Posted on May 8, 2012 by

I used to characterize myself as an analoger, enjoying the beauty found from Razavi’s analog CMOS book and Hastings’s layout art book. Then, I became worried of being a pure analoger, because it seems Moore’s law tries to push everything … Continue reading →

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An Interesting Tutorial Given by Mr. Matching

Posted on March 2, 2012 by

Are you familiar with this seminal paper, titled “Matching Properties of MOS Transistors” with the first author Marcel Pelgrom? Yes! Pelgrom, the Mr. Matching! I happened to find an online tutorial dealing with component matching given by him from IDESA. … Continue reading →

Posted in Analog Design, MOS Models | Tagged , , | 1 Comment