Tag Archives: ADC nonlinearity

Brief Study of Dither C: Dithered DNL

InĀ ‘Dither’ series B, I have shown dither reduces the harmonic distortion by decolalizing the code mapping of the analog signal from the transfer curve. So if we take a step further, we might say the main purpose of dither is … Continue reading

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Brief Study of Dither B: Dither

In ‘Dither’ series A, I mentioned that the quantization will introduce large harmonics to a low-level sinusoidal signal. Let’s look at another example in Figure 1 [1]. Adding dither to the circuit means adding noise to the circuit. Now let’s … Continue reading

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ADC Performance B: INL vs. THD

In the previous post, I’ve looked at the relation between DNL and SNR. In DNL plot, where the variation of the nonlinearity error just looks like noise, so it’s easy to imagine that the SNR will be degraded due to … Continue reading

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